
R2J20702NP Target Specification
REJ03G1782-0401 Rev.4.01 Page 11 of 27
Jun 17, 2010
Application Example
Start-up Settings
Case 1) Standalone or master chip in parallel operation
With the RC network on the TRK-SS pin, the voltage on the pin should ramp up slowly.
0.6 V
TSS = − CR × Ln (1 − 0.6 V / 5 V) (s)
ON/OFF
REG5
TRK-SS
R
TRK-SS
C
Vout
Case 2) Coincident tracking
The TRS-SS signal for channel two is the voltage from Vout1 after division by a resistor network. Vout1
must be greater than Vout2. Cross-talk is not generated between the channels.
REG5
TRK-SS
FB
Channel 1
SW
R
Vout1
C
R1
REG5
TRK-SS
FB
Channel 2
SW
From Vout1
R2
R3
Vout2
R4 R3
Vout2 (nominal) = 0.6 V × (R3 + R4) / R4
Vout1 (nominal) = 0.6 V × (R1 + R2) / R2
R4
Vout1
Output
voltage
Vout2
Time
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